NDLI: Symbolic algebra and timing driven data-flow synthesis

Content Provider	IEEE Xplore Digital Library
Author	Peymandoust, A. De Micheli, G.
Copyright Year	2001
Description	Author affiliation: Comput. Syst. Lab., Stanford Univ., CA, USA (Peymandoust, A.)
Abstract	The growing market of multi-media applications has required the development of complex ASICs with significant data-path portions. Unfortunately, most high-level synthesis tools and methods cannot automatically synthesize data paths such that complex arithmetic library blocks are intelligently used. Symbolic computer algebra has been previously used to automate mapping data flow into a minimal set of complex arithmetic components. In this paper, we present extensions to the previous methods in order to find the minimal critical path delay (CPD) mapping. A new algorithm is proposed that incorporates symbolic manipulations such as tree-height-reduction, factorization, expansion, and Horner transformation. Such manipulations are used as guidelines in initial library element selection. Furthermore, we demonstrate how substitution can be used for multi-expression component sharing and critical path delay optimization.
Starting Page	300
Ending Page	305
File Size	613239
Page Count	6
File Format	PDF
ISBN	0780372476
ISSN	10923152
DOI	10.1109/ICCAD.2001.968637
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-11-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algebra Timing Libraries Polynomials Arithmetic Delay Guidelines High level synthesis Hardware Resource management
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Software

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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