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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | de la Rosa, J.M. Kaiser, A. Perez-Verdu, B. |
| Copyright Year | 1998 |
| Description | Author affiliation: IMSE-CNM, Sevilla, Spain (de la Rosa, J.M.) |
| Abstract | A simulation tool named SDSI, specifically suited for the simulation of switched-current (SI) sigma-delta data converters, has been developed in an interactive design environment. The tool exploits the sampled-data nature of the circuits and provides several levels of hierarchy for the models. High level behavioural models are suited for initial system-level simulations and specification of building blocks. Lower level models, which take into account non-linear effects and eventually full SPICE level transistor models, are suited for bottom-up verification of circuits after the design of the building-blocks. There are no restrictions on the interoperability of both types of models. Very fast simulation times are achieved thanks to the sampled-data simulation approach, making the tool appropriate for the extensive analysis of sigma-delta modulators. The tool has been used to check the performance of a SI bandpass sigma-delta modulator fabricated in a 0.8 /spl mu/m CMOS technology. Experimental results validate this approach to the verification of SI sigma-delta modulators. |
| Starting Page | 157 |
| Ending Page | 160 |
| File Size | 361095 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780350081 |
| DOI | 10.1109/ICECS.1998.814854 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1998-09-07 |
| Publisher Place | Portugal |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Delta-sigma modulation Circuit simulation Mathematical model Clocks Voltage Analytical models CMOS technology Switching circuits MATLAB Capacitors |
| Content Type | Text |
| Resource Type | Article |
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