NDLI: Characterisation of lead-free solder pastes for low cost flip-chip bumping

Content Provider	IEEE Xplore Digital Library
Author	Jackson, G.J. Durairaj, R. Ekere, N.N.
Copyright Year	2002
Description	Author affiliation: Electron. Manuf. Eng. Res. Group, Salford Univ., UK (Jackson, G.J.; Durairaj, R.; Ekere, N.N.)
Abstract	The need to implement high volume production for a Pb-free flip-chip assembly (unpackaged silicon die, with inputs/outputs I/Os at sub 100 /spl mu/m pitch) has raised interest within the electronics manufacturing industry to find reliable inexpensive manufacturing methods. One method currently being researched is wafer bumping using Pb-free solder paste stencil printing. The introduction of Pb-free materials is being driven by a European directive, Waste from Electronic and Electrical Equipment (WEEE), which necessitates the elimination of lead containing materials from electronics products by January 2008. This has put tremendous pressure on the electronics industry to find a suitable replacement for the widely used tin/lead based solder paste. One material already highlighted is the tin/silver/copper alloy. However, in order to successfully implement the new material into current manufacturing processes, an in-depth understanding of the materials properties is required; as little information is presently known. In this paper we evaluate the rheological properties of certain tin/silver/copper solder pastes currently being developed for low cost flip-chip wafer bumping. Rheological measurements provide useful data for understanding flow behaviour of solder pastes in the stencil printing process. Factors affecting the rheology of solder pastes are alloy type, particle size distribution (PSD), metal content and flux vehicle system. Removal of lead from the solder paste and developments in the flux to accommodate Pb-free materials will inherently affect the flow properties of the solder paste. Therefore, it is essential to the stencil printing process that these new lead-free materials are characterised in a rheological nature. This study, therefore, aims to understand the rheological behaviour of certain lead-free solder pastes for flip-chip assembly applications and to subsequently assist in new formulations replacing lead solders.
Starting Page	223
Ending Page	228
File Size	491897
Page Count	6
File Format	PDF
ISBN	0780373014
DOI	10.1109/IEMT.2002.1032759
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-07-17
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Environmentally friendly manufacturing techniques Lead Costs Rheology Printing Tin Assembly Waste materials Silver Production
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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