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Content Provider | IEEE Xplore Digital Library |
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Author | Van Ginderdeuren, J. De Man, H. De Loore, B. Van Den Audenaerde, G. |
Copyright Year | 1986 |
Description | Author affiliation: Katholieke Universiteit Leuven, Heverlee, Belgium (Van Ginderdeuren, J.) |
Abstract | The semi-automatic design and integration of a digital audio preamplifier filter set is discussed. The set consists of an offset filter, 10 graphic equalizer sections and a scratch filter with an overall signal-to-noise ratio of 100 dB. A silicon compiler CATHEDRAL-I supports the design cycle from specifications to layout; the combination of synthesis with optimization tools at all design levels leads to a very compact silicon integration. An experimental chip integrates the offset filter, 3 equalizer sections and the scratch filter. The area is 24, $3mm^{2}in$ coservative 6µm NMOS or $8mm^{2}when$ scaling down to 3µm technology, allowing for functional densities up to 0.2 $mm^{2}/pole-zero.$ This demonstrates the potential for very cheap digital HIFI signal processing. |
Starting Page | 1537 |
Ending Page | 1540 |
File Size | 220813 |
Page Count | 4 |
File Format | |
DOI | 10.1109/ICASSP.1986.1168661 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 1986-04-07 |
Publisher Place | Japan |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Digital filters Digital signal processing Equalizers Process design Preamplifiers Graphics Signal to noise ratio Silicon compiler Layout Signal synthesis |
Content Type | Text |
Resource Type | Article |
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