Loading...
Please wait, while we are loading the content...
An intergrated DC-DC converter with digital one-step dead-time correction
| Content Provider | Semantic Scholar |
|---|---|
| Author | Zhao, April Shorten, A. Nishio, Haruhiko |
| Copyright Year | 2010 |
| Abstract | This paper presents an integrated 6V to 1V, 3W DC-DC converter with a novel one-step dead-time digital controller designed for 40V 0.25μm CMOS technology. The proposed one-step digital control scheme can continuously optimize the dead-times for the turn-on and turn-off of the power MOSFETs. Comparing with previously reported dead-time optimization techniques, this work can achieve quick and accurate adjustment of the dead-time with minimum chip area overhead. A 10-bit hybrid DPWM modulation circuit, a NOR gate and a level shifter circuit are integrated with the output stage to detect and measure the duration of the unwanted low-side MOSFET body-diode conduction. Experimental results shows a 1% to 5% power conversion efficiency improvement. |
| Starting Page | 57 |
| Ending Page | 60 |
| Page Count | 4 |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.vrg.utoronto.ca/~shortena/documents/ispsd2010.pdf |
| Journal | 2010 22nd International Symposium on Power Semiconductor Devices & IC's (ISPSD) |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
