NDLI: Analytical drain current model of strained junctionless nanowire tunnel field-effect transistor fabricated on Si1−xGex virtual substrate

Content Provider	IET Digital Library
Author	Zhang, Yefei Li, Zunchao
Abstract	This study proposes an analytical drain model of the strained junctionless nanowire tunnel field-effect transistor fabricated on the S i 1 − x G e x virtual substrate. The surface potential is derived by solving Poisson's equation in the channel region. Effects of the strained silicon on the potential profile can be expressed as a function of the Ge concentration in the S i 1 − x G e x virtual substrate. An analytical expression for the drain current is derived by using the tangent line approximation method. The strain induced in the device could reduce the effective tunnelling barrier significantly, resulting in a larger band-to-band tunnelling generation rate and, therefore, higher drive current compared with the unstrained device. Impacts of device parameters such as the channel diameter, gate oxide thickness and gate dielectric constant on the device performance are investigated. Results of the proposed model are verified by comparing with the device simulator.
Starting Page	1195
Ending Page	1200
Page Count	6
ISSN	1751858X
Volume Number	14
e-ISSN	17518598
Issue Number	Issue 8, Nov (2020)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/14/8
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2019.0515
Journal	IET Circuits, Devices & Systems
Publisher Date	2020-08-17
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Analytical Drain Current Model Band-to-band Tunnelling Generation Rate Channel Diameter Design And Testing Differential Equation (numerical Analysis) Drive Current Effective Tunnelling Barrier Equivalent Circuit Gate Dielectric Constant Gate Oxide Thickness Ge-Si Alloy Insulated Gate Field Effect Transistors Junctionless Nanowire Transistors Poisson Equation Semiconductor Device Model Semiconductor Device Modelling Si1−xGex Strained Junctionless Nanowire Tunnel Field-effect Transistor Strained Silicon Surface Potential Tangent Line Approximation Tunnel Field-effect Transistors Tunnelling Barrier Virtual Substrate
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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