NDLI: Placing Streaming Applications with Similarities on Dynamically Partially Reconfigurable Architectures

Content Provider	IEEE Xplore Digital Library
Author	Angermeier, J. Wildermann, S. Sibirko, E. Teich, J.
Copyright Year	2010
Abstract	By means of partial reconfiguration, parts of the hardware can be dynamically exchanged during operation what allows to adapt the system to changing requirements, and even enables the implementation of self-managing systems. This however requires sophisticated system architectures as well as proper algorithmic runtime support. In this paper, we present an algorithm for placing streaming applications at runtime. The approach considers the heterogeneity of common FPGAs, such as Block-RAMs, as well as the routing restrictions of on-chip streaming interconnections. To reduce reconfiguration time, we extend the data flow graphs by OR-nodes to describe differing parts of applications while keeping their similarities. This allows us to model systems which only reconfigure differing parts when switching between applications. The proposed algorithm is implemented as runtime support on an FPGA-based system-on-chip.
Starting Page	91
Ending Page	96
File Size	727410
Page Count	6
File Format	PDF
ISBN	9781424495238
DOI	10.1109/ReConFig.2010.52
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-12-13
Publisher Place	Mexico
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Runtime Heuristic algorithms Bandwidth Computer architecture Hardware System-on-a-chip Field programmable gate arrays
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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