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Content Provider | IEEE Xplore Digital Library |
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Author | Herve, M. Youness, H. Dominique, T. Remi, R. Fabien, D. Damien, R. Christian, M. Dominique, B. Cyril, B. Regis, M. |
Copyright Year | 2011 |
Description | Author affiliation: Hispano-Suiza, Safran Group, Réau, France (Regis, M.) || Université de Lyon, UCBL, Lab. Ampere, Villeurbanne, France (Christian, M.; Dominique, B.) || Université de Lyon, INSA Lyon, Lab. Ampere, Bât. Léonard de Vinci - INSA Lyon, 21, avenue Jean Capelle, Villeurbanne, France (Herve, M.; Youness, H.; Dominique, T.; Remi, R.; Fabien, D.; Damien, R.; Cyril, B.) |
Abstract | A multi-physics model of the VJFET with a lateral channel is presented. The model has been implemented and tested in SABER using the MAST language. The model includes an asymmetric representation of the lateral channel which is the main contribution of the paper. The blocking condition is not so obvious and it is presented in details. Each junction of the structure is represented as a Shockley pn-junction model in parallel with the associated junction capacitance. The comparison between simulations and experiments yields to satisfying results, both in static and dynamic conditions. The analysis of the remaining difficulties to be solved is given. |
Starting Page | 1 |
Ending Page | 10 |
File Size | 699604 |
Page Count | 10 |
File Format | |
ISBN | 9781612841670 |
e-ISBN | 9789075815146 |
e-ISBN | 9789075815153 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2011-08-30 |
Publisher Place | United Kingdom |
Access Restriction | Subscribed |
Rights Holder | EPE ASSOCIATION |
Subject Keyword | Semiconductor device modeling Silicon carbide Power semiconductor device Logic gates Device characterisation Capacitance JFET JFETs Mathematical model Junctions Silicon Carbide (SiC) Device modeling |
Content Type | Text |
Resource Type | Article |
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