NDLI: Hardware EDF scheduler implementation on controller area network controller

Content Provider	IEEE Xplore Digital Library
Author	Shokry, H. Shedeed, M. Hammad, S. Shalan, M. Wahdan, A.
Copyright Year	2009
Description	Author affiliation: Mentor Graphics Egypt (Shokry, H.; Shedeed, M.; Hammad, S.) \|\| Computer and Systems Department, Faculty of Engineering, Ain Shams University, Egypt (Shalan, M.; Wahdan, A.)
Abstract	Controller Area Network (CAN) is widely used in real-time automobile control and is gaining wider acceptance as a standard for automotive networking. The applicability of Earliest Deadline (EDF) techniques to the scheduling of CAN messages has been shown in previous researches. Earliest deadline can guarantee higher network utilization than fixed-priority schemes like Deadline or Rate Monotonic (DM, RM), but the EDF technique continuous deadlines (priorities) update at each scheduling round results in high CPU overhead. The paper describes a way to decrease such CPU overhead by implementing EDF scheduler dedicated hardware and embedding it within the CAN controller open core IP. Consequently high reduction in CPU overhead is achieved. This paper also validates the design and implementation of the hardware EDF algorithm on a commonly used CAN controller connected on a SoC design. Hence, this paper can be considered as introducing a new generation of more efficient CAN controllers to be used in several industry domains.
Starting Page	1
Ending Page	6
File Size	1056199
Page Count	6
File Format	PDF
ISBN	9781424457489
e-ISBN	9781424457502
DOI	10.1109/IDT.2009.5404095
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-11-15
Publisher Place	Saudi Arabia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Protocols Job shop scheduling Communication system control EDF scheduling Telecommunication traffic Control systems CAN controller Processor scheduling Intrusion detection CAN bus Hardware Delta modulation
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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