NDLI: Robust design of CMOS wireless SoC for 3D-integrated small transferjet™ module

Content Provider	IEEE Xplore Digital Library
Author	Agawa, K. Seto, I. Miyashita, D. Okano, M.
Copyright Year	2015
Description	Author affiliation: Semicond. & Storage Products Co., Toshiba Corp., Kawasaki, Japan (Agawa, K.; Seto, I.; Miyashita, D.; Okano, M.)
Abstract	TransferJet™ is an emerging high-speed close-proximity wireless communication standard, which enables a data transfer of up to 522 Mbps within a few centimeters transmission range. We have designed a fully integrated TransferJetTM SoC with a 4.48-GHz operating frequency and a 560-MHz signal bandwidth using a 65 nm CMOS technology. A module has also been developed employing 3D integration technology. The SoC with RF and digital baseband circuits is embedded in an organic resin substrate of the module to achieve a module size of 4.8 mm × 4.8 mm × 1.0 mm. Since RF signals are sensitive to the low height and small footprint of the module, we propose a waveform pre-emphasis scheme to handle the ultra-wide bandwidth and a programmable power attenuator for precise output power in the transmitter of the SoC to meet the TransferJetTM standard.
Starting Page	43
Ending Page	45
File Size	816931
Page Count	3
File Format	PDF
e-ISBN	9781467377942
DOI	10.1109/RFIT.2015.7377881
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-08-26
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	UWB waveform pre-emphasis Bluetooth module Transceivers Large scale integration WLAN power attenuator Radio frequency Wireless communication Degradation Bandwidth TransferJet™ 3D integration Power generation
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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3D-integrated, low-height, small module design techniques for 4.48GHz, 560MHz-bandwidth TransferJet™ transceiver

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