NDLI: A 24GHz low phase noise feedback CMOS LC-VCO

Content Provider	IEEE Xplore Digital Library
Author	Dongsheng Yang Lei Zhang Hongrui Wang Dajie Zeng Chunyuan Zhou Dongxu Yang He Qian
Copyright Year	2011
Description	Author affiliation: Institute of Microelectronics, Tsinghua University, Beijing, 10084, China (Dongsheng Yang; Lei Zhang; Hongrui Wang; Dajie Zeng; Chunyuan Zhou; Dongxu Yang; He Qian)
Abstract	This paper proposes an effective method to improve phase noise in voltage controlled oscillator (VCO), which is realized with 90nm RF CMOS technology. A current source is used in this design to control the VCO power consumption, while the filtering technique is incorporated to reduce VCO phase noise, and a feedback loop from output to input is also adopted to further improve the phase noise performance. A •100.85 — •104.7dBc/Hz phase noise is achieved at 1MHz offset, and the frequency tuning range(FTR) spans from 24.7GHz to 28.8GHz, with a total power consumption of 5.5mW from 1.2V supply.
Starting Page	1
Ending Page	2
File Size	186684
Page Count	2
File Format	PDF
ISBN	9781457719981
e-ISBN	9781457719974
e-ISBN	9781457719967
DOI	10.1109/EDSSC.2011.6117707
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-11-17
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Voltage-controlled oscillators Phase noise Capacitors Tuning Phase locked loops mm-Wave LC VCO Phase Noise Feedback CMOS
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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