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Content Provider | IEEE Xplore Digital Library |
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Author | Steensma, J. Vanhoof, B. Cathoor, F. de Man, H. |
Copyright Year | 1993 |
Description | Author affiliation: IMEC, Leuven, Belgium (Steensma, J.; Vanhoof, B.; Cathoor, F.; de Man, H.) |
Abstract | The authors present a hierarchical symbolic macro test approach for heterogeneous systems applied to a complex voice coder application. This design has been generated with the Cathedral high-level synthesis environment and obeys the Macro design and test concept. The proposed test approach starts by generating the test set for all the primitive macro's (PLAs, ROMs, RAMs, data path building blocks, multi-level logic FSMs) using dedicated test generation tools. Then these test sets are assembled at the data path and system level using our new symbolic macro test method to obtain a test program for the whole voice coder chip. The method efficiently supports partial scan, reconvergent paths, varying word lengths of connections and test compaction. |
Starting Page | 215 |
Ending Page | 223 |
File Size | 472941 |
Page Count | 9 |
File Format | |
ISBN | 0780309960 |
DOI | 10.1109/VLSISP.1993.404485 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 1993-10-20 |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | System testing Digital signal processing Logic testing Test pattern generators Libraries Read only memory Control systems Hardware Automatic test pattern generation Automatic testing |
Content Type | Text |
Resource Type | Article |
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