NDLI: Capacitance Modeling for Deep Submicron Thin Gate Oxide MOSFETs

Content Provider	IEEE Xplore Digital Library
Author	Arora, Narain D. Rios, Rafael Antoniadis, Dimitri A.
Copyright Year	1995
Description	Author affiliation: Digital Equipment Corporation, Hudson, MA, 01749 USA. (Arora, Narain D.; Rios, Rafael) \|\| Massachusetts Institute Of Technology, Cambridge, MA, 02139, USA (Antoniadis, Dimitri A.)
Abstract	In this paper we report a physically based thin gate oxide MOSEET model for ULSI circuit simulations. It is shown that to accurately model current and capacitances in these devices down to 0.1¿m channel length, one must use effective gate oxide thickness that is larger than the physical thickness in the classical MOSFET circuit models. The increase in the effective T from its physical value depends upon physical value of T and channel doping. Although effective value of T is bias dependent, a bias independent value is sufficient to use for circuit models. The advantage of using a physical T is that the statistical variation in the process during the chip design cycle can easily be taken into account.
Starting Page	569
Ending Page	572
File Size	385430
Page Count	4
File Format	PDF
ISBN	286332182X
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-09-25
Publisher Place	The Netherlands
Access Restriction	Subscribed
Rights Holder	Editions Frontieres
Subject Keyword	Capacitance Circuit simulation Equations Semiconductor process modeling Doping SPICE Threshold voltage Ultra large scale integration MOSFET circuits Chip scale packaging
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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