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Content Provider | IEEE Xplore Digital Library |
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Author | Raducan, C. Neag, M. |
Copyright Year | 2015 |
Description | Author affiliation: Tech. Univ. of Cluj-Napoca, Cluj-Napoca, Romania (Raducan, C.; Neag, M.) |
Abstract | This paper presents a high slew-rate error amplifier (EA) used to implement a capacitorless low-dropout voltage regulator (LDO) with a very fast transient response. The proposed EA improves a recently published OA structure, by employing high-swing input buffers and a local common mode feedback. Thus, the figures-of-merit related to the EA gain-bandwidth and slew-rate are 2.75, respectively 24 times better than for the initial OA. The EA was used to implement a LDO that requires only 1.1uA quiescent current but has an output current capability of 100mA. The high slew-rate of the EA helps this LDO to achieve low overshoot/undershoot (200mV/274mV) in case of a fast (1us) load step of 100mA, while employing only an on-chip load capacitance of 100pF. Compared with similar implementations, the proposed LDO yields same or better transient performance while requiring significantly less quiescent current. Thus its figure of merit results at least three times better than for its counterparts. The line and load regulation are 0.07mV/V, respectively 0.0028mV/mA. |
Starting Page | 285 |
Ending Page | 288 |
File Size | 805796 |
Page Count | 4 |
File Format | |
ISBN | 9781479988624 |
ISSN | 1545827X |
e-ISBN | 9781479988631 |
DOI | 10.1109/SMICND.2015.7355234 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2015-10-12 |
Publisher Place | Romania |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Regulators Transistors Capacitors Transient analysis Voltage control Logic gates Capacitance LDO high slew-rate error amplifier |
Content Type | Text |
Resource Type | Article |
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