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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yi-Lung Cheng Bor-Jou Wei Yi-Lung Wang |
| Copyright Year | 2009 |
| Description | Author affiliation: Department of Materials Science and Engineering, National Chung-Hsing University, Hsinchu, Taiwan, China (Bor-Jou Wei; Yi-Lung Wang) || Department of Electrical Engineering, National Chi Nan University, 1 University Rd. Puli, Nantou, Taiwan, China (Yi-Lung Cheng) |
| Abstract | Electromigration in Cu dual damascene interconnections has been investigated in terms of metal line width and thickness. The failure lifetime was found to decrease with decreasing line thickness and width. Furthermore, electromigration lifetime was greatly decreased as the line width was decreased to 0.07 m width. In addition to interface diffusion, the microstructure of Cu can be the dominant path for electromigraton mass transport. As a result, as the generation is scaled down to below 45 nm technology, electromigration behaviour will limit allowable current in the integrated circuit. In this study, the process improvement actions including the new copper surface passivation and bamboo-like Cu microstructure are presented and demonstrated an improvement electromigration performance. |
| Starting Page | 698 |
| Ending Page | 701 |
| File Size | 6764977 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424439119 |
| ISSN | 19461542 |
| DOI | 10.1109/IPFA.2009.5232557 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-07-06 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Electromigration Copper Integrated circuit interconnections Microstructure Failure analysis Temperature Testing Materials science and technology Integrated circuit technology Passivation |
| Content Type | Text |
| Resource Type | Article |
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