NDLI: A 90 nm CMOS wideband low noise amplifier using bandwidth extension technique

Content Provider	IEEE Xplore Digital Library
Author	Yueh-Hua Yu Jau-Horng Chen Chen, Y.-J.E.
Copyright Year	2011
Description	Author affiliation: Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan (Yueh-Hua Yu; Chen, Y.-J.E.) \|\| Department of Engineering Science and Ocean Engineering, National Taiwan University, Taipei, Taiwan (Jau-Horng Chen)
Abstract	A compact 90 nm CMOS wideband low noise amplifier (LNA) adopting bandwidth extension techniques is presented. The low noise characteristic of the LNA is achieved by the noise canceling technique and its gain flatness and bandwidth is enhanced by the gate inductive-peaking technique. The peaking inductor is realized by an active inductor for compact size and stability control. Without using any passive inductor, the size of the LNA core circuit is only 100 µm × 150 µm. From measurement results, the CMOS wideband LNA achieves a flat power gain of 12 dB with maximum variation of 0.5 dB from 100 MHz to 3600 MHz. The measured noise figure is 2.3 dB. Operated at 1.2 V, the CMOS LNA consumes 13 mW of power.
Starting Page	502
Ending Page	505
File Size	517568
Page Count	4
File Format	PDF
ISBN	9781457720345
e-ISBN	9780858259744
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-12-05
Publisher Place	Australia
Access Restriction	Subscribed
Rights Holder	Institution of Engs Australi
Subject Keyword	CMOS integrated circuits Gain Wideband CMOS technology Noise Inductors noise canceling wideband CMOS low noise amplifier gain flatness
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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