NDLI: Quantitative analysis on caching effect of I-structure data in frame-based multithreaded processing

Content Provider	IEEE Xplore Digital Library
Author	Hyong-Shik Kim Soonhoi Ha Chu-Shik Jhon
Copyright Year	1997
Description	Author affiliation: Dept. of Comput. Eng., Seoul Nat. Univ., South Korea (Hyong-Shik Kim)
Abstract	Since long latency due to remote memory access could be tolerated by rapidly switching to another thread in multithreaded processing, caching I-structure data is expected to have less beneficial effect on the performance than caching ordinary data. In this paper we show that caching I-structure data could improve the overall performance in spite of latency tolerating property of multithreading. Our quantitative analysis reveals that the most important caching effect off-structure data in frame-based multithreading is the enhancement of frame parallelism. It reduces the idle time due to latency by lowering latency sensitivity and at the same time decreases the thread processing time by exploiting more processors.
Starting Page	122
Ending Page	125
File Size	442053
Page Count	4
File Format	PDF
ISBN	081868108X
ISSN	01903918
DOI	10.1109/ICPP.1997.622573
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-08-11
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delay Yarn Switches Multithreading Performance analysis Data engineering Parallel processing Computational modeling Processor scheduling Cache memory
Content Type	Text
Resource Type	Article

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Quantitative analysis on caching effect of I-structure data in frame-based multithreaded processing