NDLI: Synthesizing neural networks by sequential addition of hidden nodes

Content Provider	IEEE Xplore Digital Library
Author	Qi Li Tufts, D.W.
Copyright Year	1994
Description	Author affiliation: Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA (Qi Li; Tufts, D.W.)
Abstract	Presents a fast training algorithm with which one can sequentially determine the needed hidden nodes and the values of the associated weights for classification and pattern recognition. This new approach addresses problems in backpropagation and other gradient descent training algorithms. These problems include long training times, and the determination of the proper number of hidden nodes. We mitigate these difficulties by sequentially extracting important attributes of the training data in training each hidden node. The proposed algorithm separates the network training into the training of each layer of the network. The input layer is designed to partition the input data space using linear discriminant functions. The training starts from one hidden node. By applying a linear discriminant algorithm, a separable subset of the data is deleted from the training set. The remaining data is carried over to the training of the next hidden nodes. A hidden node is added to the network when it is needed because the classification performance on the training set is not yet good enough. Thus the training data set is reduced sequentially while the training is in progress. Each node of the output layer performs a logic function of the binary outputs of the hidden nodes. The training algorithm for the output layer is same as Boolean minimization.
Starting Page	708
Ending Page	713
File Size	534412
Page Count	6
File Format	PDF
ISBN	078031901X
DOI	10.1109/ICNN.1994.374263
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-06-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Network synthesis Neural networks Training data Backpropagation algorithms Pattern recognition Partitioning algorithms Performance analysis Data mining Logic functions Minimization methods
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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