NDLI: Performance of two-stage massive correlator architecture for fast acquisition of GPS signals

Content Provider	IEEE Xplore Digital Library
Author	Akopian, David Sagiraju, Phani K. Turunen, Seppo
Copyright Year	2006
Description	Author affiliation: University of Texas at San Antonio, USA (Akopian, David; Sagiraju, Phani K.) \|\| Nokia Corporation, Tampere, Finland (Turunen, Seppo)
Abstract	A typical operation of GPS receivers assumes a search of the satellites visible on the sky by synchronizing locally generated replica with the transmitted pseudo-random noise (PRN) code sequence. This synchronization is initially performed by finding the highest correlation between the incoming signal and replica, a process known as “acquisition”. Highest correlation is observed as a correlator peak response which is compared with a certain threshold to identify availability and values of unknown code phase and frequency of a residual carrier modulation. If the peak is not detected or the decision is wrong then acquisition stage should be repeated many times which is quite a time consuming task. State-of-the-art advanced receivers use massive correlators which parallelize the acquisition process. While massive correlators improve significantly the sensitivity of the receivers, so-called multiple peak selection approach provides an opportunity to save computations by sharing tasks between the massive correlator and validation system [1]. In this paper we study a performance of two stage correlator consisting of massive and supplementary implementations. The massive correlator is not making firm decisions each time it finds a peak, but provides several possible options (a limited set of highest peaks) to supplementary system.
Starting Page	137
Ending Page	140
File Size	939211
Page Count	4
File Format	PDF
ISBN	9781424403585
DOI	10.1109/TPSD.2006.5507444
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-04-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Correlators Global Positioning System Modulation coding Frequency synchronization Phase modulation Satellite navigation systems Bandwidth Noise generators Signal processing Availability
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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