NDLI: An approach for detecting bridging fault-induced delay faults in static CMOS circuits using dynamic power supply current monitoring

Content Provider	IEEE Xplore Digital Library
Author	Walker, A. Lala, P.K.
Copyright Year	1997
Description	Author affiliation: Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA (Walker, A.)
Sponsorship	IEEE Comput. Soc. Tech. Committee on Test Technol
Starting Page	73
Ending Page	77
File Size	391253
Page Count	5
File Format	PDF
ISBN	0818681233
DOI	10.1109/IDDQ.1997.633017
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-11-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault detection Delay Circuit faults Electrical fault detection Power supplies CMOS logic circuits Current supplies Rails Integrated circuit interconnections Monitoring
Content Type	Text
Resource Type	Article

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An approach for detecting bridging fault-induced delay faults in static CMOS circuits using dynamic power supply current monitoring