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Content Provider | IEEE Xplore Digital Library |
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Author | Yingjie Cao Yongxin Zhu Xu Wang Jiang Jiang Meikang Qiu |
Copyright Year | 2013 |
Description | Author affiliation: Sch. of Microelectron., Shanghai Jiaotong Univ., Shanghai, China (Yingjie Cao; Yongxin Zhu; Xu Wang; Jiang Jiang) || Dept. of Electr. & Comput. Eng., Univ. of Kentucky, Lexington, KY, USA (Meikang Qiu) |
Abstract | We present an FPGA (field programmable gate array) based PCI-E (PCI-Express) root complex architecture for SOPCs (System-on-a-Programmable-Chip) in this paper. In our work, the system on the FPGA serves as a PCIE master device rather than a PCIE endpoint, which is usually a common practice as a co-processing device driven by a desktop computer or a server. We use this system to control a PCIE endpoint, which is also an FPGA based endpoint implemented on another FPGA board. This architecture requires only IP cores free of charge. We also provide basic software driver so that specific device driver can be developed on it to control popular PCIE device in the future, i.e. ethernet card or graphic card. The whole architecture has been implemented on Xilinx Virtex-6 FPGAs to indicate that this architecture is a feasible approach to standalone SOPCs, which has better efficiencies than those with additional generic controlling processors. |
Sponsorship | IEEE Comput. Soc. |
Starting Page | 149 |
Ending Page | 152 |
File Size | 388955 |
Page Count | 4 |
File Format | |
ISBN | 9781467360050 |
e-ISBN | 9780769549699 |
DOI | 10.1109/FCCM.2013.29 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2013-04-28 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Field programmable gate arrays Computer architecture Bridges IP networks Software Bandwidth Registers SOPC PCI-E Root Complex FPGA |
Content Type | Text |
Resource Type | Article |
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