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Content Provider | IEEE Xplore Digital Library |
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Author | Feng Wenxiao Lu Tiejun Wang Zongmin |
Copyright Year | 2009 |
Abstract | This paper presents the analysis and design of high speed, high gain fully differential operational amplifier(op-amp). The op-amp is designed for sample and hold circuit of 14 bit 100MS/s pipelined analog-to-digital converter (ADC). Both the main op-amp and the boosting op-amp are fully differential folded-cascode. The main op-amp has a switched capacitance common mode feedback circuit. The boosting op-amp is connected as a follower. The op-amp is designed in 0.18um CMOS process with 3.0V power supply. Spectre simulation shows that the op-amp has the DC gain of 112dB and the unity gain bandwidth of 1.15GHz. |
Starting Page | 66 |
Ending Page | 69 |
File Size | 352878 |
Page Count | 4 |
File Format | |
ISBN | 9781424452095 |
DOI | 10.1109/NCM.2009.133 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2009-08-25 |
Publisher Place | South Korea |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Operational amplifiers Power supplies Circuit simulation Boosting CMOS process Pipelined ADC Folded cascode Analog-digital conversion Switching circuits Boosting amplifier Fully differential op-amp Feedback circuits Capacitance Differential amplifiers |
Content Type | Text |
Resource Type | Article |
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