NDLI: A 48-mW, 12-bit, 150-MS/s pipelined ADC with digital calibration in 65nm CMOS

Content Provider	IEEE Xplore Digital Library
Author	Bei Peng Guanzhong Huang Hao Li Peiyuan Wan Pingfen Lin
Copyright Year	2011
Description	Author affiliation: Beijing University of Technology, China (Bei Peng; Guanzhong Huang; Peiyuan Wan; Pingfen Lin) \|\| University of Science and Technology of China, Hefei, China (Hao Li)
Abstract	A 1.2 V 12-bit 150 MS/s pipelined ADC with low-gain op-amps (DC gain ≈15 dB) is fabricated in a 65-nm CMOS process. The proposed 5-transistor single stage op-amp enables simple analog circuit to achieve low power and high speed. Digital background calibration technique is exploited to compensate the inter-stage gain error, capacitor mismatch and op-amp nonlinearity. The ADC achieves a peak SNDR of 68 dB and 67 dB and a peak SFDR of 85 dB and 81 dB with 6 MHz input at 100 MS/s and 150 MS/s, respectively. The ADC analog core occupies 0.78 $mm^{2}$ and dissipates 36 mW at 150 MHz sampling rate from a 1.2-V supply. The digital calibration circuit occupies 0.21 $mm^{2}$ and dissipates 12 mW at a clock frequency of 150MHz by estimation with software. The ADC shows a FoM of 194 fJ/conv-step at 150-MS/s from a 1.2-V supply.
Starting Page	1
Ending Page	4
File Size	413627
Page Count	4
File Format	PDF
ISBN	9781457702228
ISSN	08865930
e-ISBN	9781457702235
DOI	10.1109/CICC.2011.6055421
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-09-19
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Calibration Gain CMOS integrated circuits Capacitors CMOS technology Frequency measurement Analog circuits
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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