NDLI: Latchup-Like Failure of Power-Rail ESD Clamp Circuits in CMOS Integrated Circuits Under System-Level ESD Test

Content Provider	IEEE Xplore Digital Library
Author	Ming-Dou Ker Cheng-Cheng Yen
Copyright Year	2007
Description	Author affiliation: Nat. Chiao-Tung Univ., Hsinchu, (Ming-Dou Ker; Cheng-Cheng Yen)
Abstract	Two different on-chip power-rail electrostatic discharge (ESD) protection circuits, (1) with NMOS and PMOS feedback; and (2) with cascaded PMOS feedback, have been designed and fabricated in a 0.18 mum CMOS technology to investigate their susceptibility to system-level ESD test. The main purpose for adopting the feedback loop into the power-rail ESD clamp circuits is to avoid the false triggering during a fast power-up operation. However, during the system-level ESD test, where the ICs in a microelectronics system have been powered up, the feedback loop used in the power-rail ESD clamp circuit provides the lock function to keep the main ESD device in a "latch-on" state. The latch-on ESD device, which is often designed with a larger device dimension to sustain high ESD level, conducts a huge current between the power lines to perform a latchup-like failure after the system-level ESD test. The susceptibility of power-rail ESD clamp circuits with the additional board-level noise filter to the system-level ESD test is also investigated. To meet high system-level ESD specifications, the chip-level ESD protection design should be considered with the transient noise during system-level ESD stress.
Starting Page	1
Ending Page	4
File Size	808819
Page Count	4
File Format	PDF
ISBN	1424413494
DOI	10.1109/ISEMC.2007.163
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-07-09
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electrostatic discharge Circuit testing Clamps CMOS integrated circuits Integrated circuit testing System testing Feedback circuits Power system protection CMOS technology Feedback loop
Content Type	Text
Resource Type	Article

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