NDLI: CMOS design of a multibit bandpass continuous-time sigma delta modulator running at 1.2 GHz

Content Provider	IEEE Xplore Digital Library
Author	Benabid, S. Najafi Aghdam, E. Benabes, P. Guessab, S. Kielbasa, R.
Copyright Year	2004
Description	Author affiliation: Dept. of Meas., Ecole Superieure d'EIectricite, Gif sur Yvette, France (Benabid, S.; Najafi Aghdam, E.; Benabes, P.; Guessab, S.; Kielbasa, R.)
Abstract	This paper presents the design technique for a high speed sixth order bandpass continuous-time sigma-delta modulator in a standard 0.35/spl mu/m CMOS technology. Three resonators are implemented in a parallel structure using highly linear operational transconductance amplifiers (OTA). Furthermore, an improved method employing two 3-bit flash converters as a loop quantizer allows doubling the sampling frequency. As a consequence we can design a modulator clocked at 1.2GHz allowing the integration of passive LC-filters in this standard technology. Transistor level simulations show that the modulator can achieve a signal-to-noise and distortion-ratio (SNDR) of 98dD over a 2MHz signal band at 300MHz central frequency.
Starting Page	51
Ending Page	55
File Size	681303
Page Count	5
File Format	PDF
ISBN	0780387775
DOI	10.1109/ICCDCS.2004.1393352
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-11-03
Publisher Place	Dominican Republic
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delta-sigma modulation Delta modulation Active filters CMOS technology Frequency Sampling methods Clocks Band pass filters Delay Distortion
Content Type	Text
Resource Type	Article

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