NDLI: Applying simulated annealing for domain generation in ad hoc networks

Content Provider	IEEE Xplore Digital Library
Author	Manousakis, K. McAuley, A.J. Morera, R.
Copyright Year	2004
Description	Author affiliation: Electr. & Comput. Eng., Maryland Univ., College Park, MD, USA (Manousakis, K.)
Abstract	If heterogeneous ad hoc battlefield networks are to scale to hundreds or thousands of nodes, then they must be automatically split into separate network domains. Domains allow routing, QoS and other networking protocols to operate on the fewer nodes. This division greatly reduces the overall overhead (e.g., routing overhead with n nodes that goes from O(n/sup 2/) to O(nlogn) and allows protocols to be tuned to more homogenous conditions (K. Manousakis et al., 2002). Domain generation (or clustering) can be done using either the local or global information. The two approaches are complementary since local domain generation reacts faster, requires less overhead, and is more robust while the global domain generation provides better overall domains. While the most existing work has concentrated on the local distributed solutions, this paper reports on the new global domain generation techniques. In particular we concentrate on the design of good cost functions and efficient optimization algorithms. We show that the simple "intuitive" cost functions do not produce good domains; rather we need complex functions with multiple parameters depending on the design goals (e.g., low overhead or low delay). Although existing optimization algorithms are too slow to be useful in a large dynamic network, we show that a modified simulated annealing algorithm with well chosen cooling schedule, state transition probabilities, and stop criteria produces good quality domains in acceptable time.
Starting Page	3864
Ending Page	3868
File Size	532377
Page Count	5
File Format	PDF
ISBN	0780385330
DOI	10.1109/ICC.2004.1313276
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-06-20
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Simulated annealing Ad hoc networks Routing protocols Cost function Scheduling algorithm Robustness Algorithm design and analysis Design optimization Delay Cooling
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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