NDLI: Application of maximum-efficiency tracking control for backlight module based on phase-locked loop technique

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The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.

Volume 2 - 2004

Proceedings. The 2004 IEEE Asia-Pacific Conference on Circuits and Systems (IEEE Cat. No.04EX916)

The 2004 IEEE Asia-Pacific Conference on Circuits and Systems

Table of contents

Sessions schedule at a glace

Sessions overview

Message from the General Chair

Message from the Technical Program Chairs

International Steering Committee

Techical Program Committee

Plenary sessions

The high walls have crumpled

Can Shannon's channel capacity be challenged?

Strategies for high-tech academia uprising in 21 century

Design of OTA-C oscillator and current-mode filters using network trasportation

A location system using asynchronous distributed sensors

Ear-type systems

The world of flatness

Technical sessions

A 10-bit 350-Msample/s Nyquist CMOS D/A converter

Design of high-resolution pipelined analog-to-digital converters using multiple-phase capacitor-splitting feedback interchange technique

Filter design with voltage conveyors

A portable and wireless data transmission potentiostat

Automated phase compensation for multi-stage amplifiers

Application of maximum-efficiency tracking control for backlight module based on phase-locked loop technique

High performance PMLSM drives using TMS320F2812 DSP controller

Self-oscillating push-pull class-E/F converters

Effective power system communication requirements for deregulated power industry

A novel ZCZVT soft-switching single-stage high power factor correction converter

A high efficient non-recursive DPWT for extracting the transformed coefficients of coarser resolution levels

A novel wavelet coefficients coding scheme and its FPGA realization

An efficient 2-D DWT processor architecture based on state space implementation technique

Memory efficient and low complexity scalable soft VLC decoding for the video transmission

Gray prediction decoding algorithm for VLC decoder

Multiwavelet packet based OFDM system

On-line step-size calculation using signal power estimation-tone grouping for frequency-domain equalizer of DMT-based systems

A low-complexity LMMSE channel estimator for OFDM systems

Transmitter architecture for pulsed OFDM

Design and simulation of a baseband transceiver for IEEE 802.16a OFDM-mode subscriber stations

A new common-subexpression-sharing method for the synthesis of FIR filters

A modified reduced adder graph algorithm for multiplier block minimization in digital filters

Filter design of a servomotor encoder

Equaripple digital filters in quadrature mirror filter banks for nuclear magnetic tomography

A robust equalizer based on weighted constant magnitude algorithm

A field programmable analog array using current mode transconductor-capacitor (G/sub m/-C) technique

Realization of multiphase sinusoidal oscillator using CDBAs

Voltage to current converter for OFDM current-mode FFT LSI

A realization of simple current-mode cmos based true RMS-to-DC converter

Simulation of a mutually coupled circuit using plus-type CCII

Averaged modeling of a ZVT soft switching PFC converter

Design and implementation of FPGA-based single stage photovoltaic energy conversion system

New concept of damper on mulimachine power system

Adaptive backstepping control with integral action for PWM buck DC-DC converters

Power system stabilizers design using equivalent disturbance rejection method

No bit overhead MPEG video scrambling based on event shuffle in frequency domain

High-PSR NTSC video sync separator

Modification of context-based arithmetic coding for SPIHT

An MPEG-4 shape-adaptive inverse DCT with zero skipping and auto-aligned transpose memory

Design and implementation of an end-to-end system importing DTV from broadcasting network to broadband IP network

Downlink base transmit station modulator in WCDMA system

Blind multiuser receiver for DS-CDMA systems based on sequential monte carlo estimation

Effect of non-uniform traffic distributions on load balancing in cellular CDMA systems

La code construction and performance analysis for LAS-2000

Wide-band interference suppression receiver in a hybrid OCDMA/WDMA system

Quantum circuit design of 8x8 discrete fourier transform using its fast computation flow graph

A low power and memory efficient distributed arithmetic design and its DCT application

Error analysis and optimal parameter evaluation in FFT-based 2D-nilt method

Implementation of IMDCT for MPEG2/4 AAC on 16-bit fixed-point digital signal processors

A novel approach for radar emitter signal recognition

High-speed and reduced-area RNS forward converter based on (2/sup n/ -1, 2/sup n/, 2/sup n/ +1) moduli set

Design of reconfigurable carry select adders

Efficient VLSI architecture design for complex linear convolution using conjugate-polynomial-channel residue arithmetic system

The low latency massey-omura multiplier over GF(2/sup m/)

Design of a novel radix-4 booth multiplier

New design concept for on-chip ESD protection circuits with already-on device in nanoscale CMOS technology

Circuit design to achieve whole-chip ESD protection for UXGA/HDTV LCOS IC product

Spice model 1 parameters from BSIMv3 for fast manual circuit design

All in one 315MHz ASK UHF receiver

The 1:12 phased demultiplexer circuit

Clock recovery and data recovery design for LVDS transceiver used in LCD panels

The SOC design of a highly secure and reliable storage using a conceptual environment

An energy-delay efficient power management scheme for embedded system in multimedia applications

An efficient ASIC implementation of SHA-1 engine for TPM

A binary tree architecture for application specific network on chip (ASNOC) design

On the design of memory with low energy consumption

On the applications of mobility estimation mechanisms in wireless ad hoc networks

Dynamic load balancing for wired and wireless internet access

New families of triple-loop networks

A parent search method in peer-to-peer media streaming networks

Performance study of multi-channel multicast delivery for scheduled videos

Packet analyzer for JPEG2000 codestreams and its VHDL model

A straightforward proof of network transformations

On implementing FPGA-based reconfigurable instruments

Kronecker based fixed polarity transforms over GF(3)

Linearly independent helix transforms over GF(3)

Fast algorithm to calculate fourier transform

Water quality modeling for environmental information system

Low power and low voltage considerations in the design of a high frequency clock generator

A 3-ps dead-zone double-edge-checking phase-frequency-detector with 4.78 GHz operating frequencies

A new OTA design methodology based on feedback control systems theory

A CMOS current-voltage feedback transconductor with an 80-dB SFDR up to 100 MHz

Control unit implementation for a reduced complexity reconfigurable data acquisition architecture

An ultra low-voltage ultra low power rail-to-rail CMOS OTA Miller

Improvement of power factor and voltage for renewable energy systems using PLC's new fuzzy module

A high speed fuzzy inference processor with dynamic analysis and scheduling capabilities

A sliding-mode controller based on fuzzy logic for PWM inverters

Error backpropagation neural calibration and Kalman filter position estimation for touch panels

A novel genetic algorithm with diversity reproduction

Chaotic behaviour of first order zero crossing digital phase locked loop

A 10 Gb/s clock and data recovery circuit with binary phase/frequency detector using TSMC 0.35 /spl mu/m SiGe BiCMOS process

A joint scheme of decision-directed channel estimation and weighted-average phase error tracking for OFDM WLAN systems

Residual carrier frequency offset tracking for OFDM-based systems

Modified PN code tracking loop with multi-user detection for frequency selective fading channels

Stability verification of microwave circuits through Floquet multiplier analysis

High-speed logic circuitry used bootstrapped technology and low-temperature poly-silicon technology for TFT-LCD panel

Novel classes of linearly independent transforms for ternary logic functions

Multi-point model reductions of VLSI interconnects using the rational Arnoldi method with adaptive orders (RAMAO)

Time-domain sensitivity computation of parabolic lossless nonuniform transmission line

Multistate associative memory with parametrically coupled map networks

A low supply noise content-sensitive ROM architecture for SOC

Low power encoding schemes for run-time on-chip bus

The microarchitecture of a low power clustered register file for parallel processors

Design and implementation of an IP wrapper for an on-chip network

New universal current-mode multiple-input multiple-output OTA-C filter

A 3V robust high-speed low input impedance CMOS current comparator

A new current mirror memory cell to improve the power efficiency of CMOS current mode analog circuits

Continuous-time low-pass filter using an active distributed mosfet transistor

A rapid acquisition phase-locked loop with frequency-double circuit operated in 2.4-GHZ band

A simplification of the Log-MAP algorithm for turbo decoding

GA-based evolutionary interleaver design for turbo codes

Realization of a systematic bit-wise decomposition metric

The design of RS decoder with a small core for portable communication

Unified convolutional/turbo decoder architecture design based on triple-mode MAP/VA kernel

Two classes of recursive fast transforms over GF(3): properties, relations and computational costs

Novel recursive discrete Fourier transform with compact architecture

Error estimations of projection-based interconnect model-order reduction techniques

Comparison of the noise immunity of a LED-based multiband optoelectronic sensor when using FDMA and CDMA to code the excitation source

A new IFFT/FFT hardware implementation structure for OFDM applications

Self organizing topological tree for skin color detection

Improved K nearest neighbor classification algorithm

An unsupervised Kalman filter-based linear mixing approach to MRI classification

Character recognition with CMAC on field programmable gate array

An efficient framework for MPEG-4 HVXC encoder based on the multi-stage V/UV decision

A heuristic approach for design of FIR filters with SP2 coefficients

Image encrypted system using scan patterns and 2-D cellular automata

A novel digital watermark algorithm based on bits group

Design of directional filter banks image watermark

Digital image watermarking approach based on lapped orthogonal transform

A robust watermarldug scheme using filter and ROI

High throughput 2-D transform architectures for H.264 advanced video coders

Improved rate control via rate-quantization modeling with kalman filter

H.264 decoder optimization exploiting SIMD instructions

An edge-based interpolation algorithm for resolution enhancement at low bit-rate

Platform-dependent database and performance estimation for video application in embedded system

Video quality enhancement for Motion JPEG2000 encoding based on the human visual system

A new method for short term electric load forecasting

Application of novel hybrid techniques for short-term unit commitment problem

DC excitation control of a wind induction synchronous generator using a micro-controller

A comparative study of captured energy of wind turbines

Dynamic modeling of the SRM drive system from a step load change

The photovoltaic pumping system using a variable speed single phase induction motor drive controlled by field oriented principle

Volume 1 - 2004

Asia-Pacific Conference on Circuits and Systems

IEEE APCCAS 2000. 2000 IEEE Asia-Pacific Conference on Circuits and Systems. Electronic Communication Systems. (Cat. No.00EX394)

IEEE. APCCAS 1998. 1998 IEEE Asia-Pacific Conference on Circuits and Systems. Microelectronics and Integrating Systems. Proceedings (Cat. No.98EX242)

Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems

Application of maximum-efficiency tracking control for backlight module based on phase-locked loop technique

Content Provider	IEEE Xplore Digital Library
Author	Chang-Hua Lin Ying Lu Yu-Kang Lo Kai-Jun Pai
Copyright Year	2004
Description	Author affiliation: Dept. of Comput. & Commun. Eng., St. John's & St. Mary's Inst. of Technol., xx (Chang-Hua Lin; Ying Lu)
Abstract	Maximum-efficiency tracking control applied in the backlight module is proposed in this paper. The backlight system incorporates a phase-locked loop as a feedback mechanism to promote both the system efficiency and stability. To overcome the drawbacks of the conventional electromagnetic transformer and miniaturize the backlight module, the piezoelectric transformer is adopted for driving the cold cathode fluorescent lamp. In addition, the PLL is utilized to track the optimal operating frequency of PT for achieving maximum output efficiency
Starting Page	641
Ending Page	644
File Size	290306
Page Count	4
File Format	PDF
ISBN	0780386604
DOI	10.1109/APCCAS.2004.1412959
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-12-06
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Tracking loops Phase locked loops RLC circuits Voltage Impedance Resonant inverters Resonance Frequency Inductors Communication system control
Content Type	Text
Resource Type	Article

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