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Content Provider | IEEE Xplore Digital Library |
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Author | Fayomi, C.J.B. Roberts, G.W. |
Copyright Year | 2004 |
Description | Author affiliation: Dept. of Comput. Sci., Quebec Univ., Montreal, Que., Canada (Fayomi, C.J.B.) |
Abstract | This paper deals with design and characterization techniques of a low-voltage CMOS analog switch to be used in sample-data circuits. Hspice simulation-based simple design procedure and a characterization method are presented. The switch on-resistance, the error voltage caused by charge injection and clock feedthrough as well as non-linear distortion simulation approaches are proposed. The procedure has been applied to the design of a CMOS transmission gate operating at a 10 MHz clock signal under a 1.8 V supply voltage in a 0.18 /spl mu/m digital CMOS process. The proposed method is suited for a pencil-and-paper design. Its accuracy is limited only by the numerical accuracy of Hspice. |
File Size | 414415 |
File Format | |
ISBN | 078038346X |
DOI | 10.1109/MWSCAS.2004.1354358 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2004-07-25 |
Publisher Place | Japan |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Switches Clocks Boosting Circuit simulation Voltage CMOS process CMOS analog integrated circuits Switching circuits Nonlinear distortion Signal design |
Content Type | Text |
Resource Type | Article |
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