NDLI: An Efficient Application Processor Architecture for Multicore Software Video Decoding

Content Provider	IEEE Xplore Digital Library
Author	Chun-Jen Tsai Yan-Ting Chen Chien-Chih Tseng
Copyright Year	1991
Abstract	In this paper, we propose a new multicore application processor architecture that facilitates the adoption of the fine-granularity software-pipeline parallelism without causing an extra burden on the system bus. The proposed system-on-a-chip architecture can simultaneously support the traditional symmetric multiprocessor (SMP) and the proposed software-pipeline applications efficiently. The programming model of the proposed architecture is compatible with the existing SMP operating systems. For the implementation of the pipeline-based parallelism, new programmer-friendly system calls are suggested to take advantage of the new software-pipeline datapath. The proposed architecture with four reduced instruction set computing cores is implemented on an field-programmable gate array development board for verification. An Advanced Video Coding/H.264 baseline profile video decoder that explores the pipeline parallelism with dynamic pipeline-stage partitioning is implemented on the target platform to justify the benefits of the proposed architecture. Experimental results show that the adoption of the proposed pipeline datapath architecture into existing application processors enables new potentials in exploring software parallelism.
Sponsorship	IEEE Circuits and Systems Society
Starting Page	325
Ending Page	338
Page Count	14
File Size	3773713
File Format	PDF
ISSN	10518215
Volume Number	25
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Decoding Pipelines Streaming media Multicore processing Reduced instruction set computing wavefront video decoding Multicore application processors parallel video decoding software pipeline architecture
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Media Technology

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