NDLI: Digital Controller for DVS-Enabled DC

Content Provider	IEEE Xplore Digital Library
Author	Barai, M. Sengupta, S. Biswas, J.
Copyright Year	1986
Abstract	A high-frequency digital controller that includes an optimized analog-digital converter (ADC) with a novel formulation of digital error value based on target clock frequency and converter output voltage is presented in this paper. A programmable look-up table-based digital compensator is implemented for fast processing the feedback error. Limitations of a hybrid digital pulsewidth modulator (DPWM) at high frequency are addressed and solved by an edge-triggered logic. Support for process, voltage, and temperature variations is incorporated in the integrated design. Target clock frequency denotes the frequency of the signal which is driven by dynamic voltage scaling (DVS) processor and corresponds to the reference value of the regulated output voltage. This work realizes the classical digital controller design implementation of a target frequency to minimum required regulated voltage for DVS-enabled adaptive DC-DC converter. A synchronous buck converter of 1 MHz switching frequency and the proposed delay-line-based optimized ADC have been fabricated for realizing and verifying the complete digital controller on a field-programmable gate array-based closed-loop prototype. Experimental results are presented, which demonstrate the fast dynamic response achieved for target clock frequency in the range of 6-16 MHz, corresponding to the regulated output voltage range of 1.6-3.2 V. The complete design of digital controller has been implemented in 0.5 ¿m CMOS technology using Cadence and Synopsys tools. The active on-chip area of the proposed delay-line ADC, digital compensator, and edge-triggered hybrid DPWM are 0.08, 0.28, and 0.07 mm² respectively.
Sponsorship	IEEE Power Electronics Society
Starting Page	557
Ending Page	573
Page Count	17
File Size	1004446
File Format	PDF
ISSN	08858993
Volume Number	25
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-03-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Digital control Voltage control Dynamic voltage scaling Analog-digital conversion Digital-to-frequency converters Clocks Frequency conversion Delay CMOS technology Error correction dynamic voltage scaling (DVS) Analog–digital converter (ADC) dc–dc power converter delay line digital controller
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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