NDLI: A New IIP2 Enhancement Technique for CMOS Down-Converter Mixers

Content Provider	IEEE Xplore Digital Library
Author	Vahidfar, M.B. Shoaei, O.
Copyright Year	2004
Abstract	The design of a CMOS mixer for cellular phone and 3G applications is challenging because of tough linearity and noise requirements. A new technique for second-order input intercept point (IIP2) enhancement of CMOS down-converter mixers is introduced in this brief. The technique is based on canceling second-order intermodulation components generated in input pseudodifferential transconductor, by injecting a nonlinear current to the mixer. Since this current is controlled by a high bandwidth feedback loop, the cancellation technique can be used in multistandard mixers for high channel bandwidth applications like UMTS and IEEE802.11 as well as GSM. A CMOS mixer demonstrating the performance for UMTS standard is designed in a 65-nm technology which can work with supplies as low as 1 V. The simulation results show that the differential and common mode IIP2 of the mixer are improved about 22 and 29 dB, respectively, while cancellation circuit consumes less than 3.3 mA. The other mixer parameters such as noise figure are not affected by the proposed technique.
Sponsorship	IEEE Circuits and Systems Society
Starting Page	1062
Ending Page	1066
Page Count	5
File Size	390957
File Format	PDF
ISSN	15497747
Volume Number	54
Issue Number	12
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-12-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS technology Bandwidth 3G mobile communication Cellular phones Linearity Noise cancellation Transconductors Feedback loop GSM Circuit simulation second-order intermodulation (IM2) CMOS mixer
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A CMOS high IIP2 mixer for multi-standard receivers

Cancellation of second-order intermodulation distortion and enhancement of IIP2 in common-source and common-emitter RF transconductors

A new down conversion active mixer with IMD2 and IMD3 cancellation in 0.18um CMOS technology

An IIP2 calibration technique for CMOS multi-standard mixers

A High IIP2 Mixer Enhanced by a New Calibration Technique for Zero-IF Receivers

Using the Gate–Bulk Interaction and a Fundamental Current Injection to Attenuate IM3 and IM2 Currents in RF Transconductors

A high IIP2 and IIP3 CMOS down-conversion active mixer

Second-Order Intermodulation in Current-Commutating Passive FET Mixers

Analysis of Third-order Intermodulation in Receiver Down-Converter Employing Multiband Feedback

A New IIP2 Enhancement Technique for CMOS Down-Converter Mixers

Similar Documents

A CMOS high IIP2 mixer for multi-standard receivers

Cancellation of second-order intermodulation distortion and enhancement of IIP2 in common-source and common-emitter RF transconductors

A new down conversion active mixer with IMD2 and IMD3 cancellation in 0.18um CMOS technology

An IIP2 calibration technique for CMOS multi-standard mixers

A High IIP2 Mixer Enhanced by a New Calibration Technique for Zero-IF Receivers

Using the Gate–Bulk Interaction and a Fundamental Current Injection to Attenuate IM3 and IM2 Currents in RF Transconductors

A high IIP2 and IIP3 CMOS down-conversion active mixer

Second-Order Intermodulation in Current-Commutating Passive FET Mixers

Analysis of Third-order Intermodulation in Receiver Down-Converter Employing Multiband Feedback

A New IIP2 Enhancement Technique for CMOS Down-Converter Mixers