NDLI: Dual-Bit/Cell SONOS Flash EEPROMs: Impact of Channel Engineering on Programming Speed and Bit Coupling Effect

Content Provider	IEEE Xplore Digital Library
Author	Datta, A. Kumar, P.B. Mahapatra, S.
Copyright Year	1980
Abstract	Programming performance of dual-bit silicon-oxide-nitride-oxide-silicon memories is studied on cells fabricated using different channel engineering schemes. Both halo and compensation implants are shown to impact the programming speed, bit coupling, and read disturb, and can be suitably adjusted to optimize the cell operation. The doping dependence of bit coupling and the programming speed are verified using well-calibrated 2-D device simulations
Sponsorship	IEEE Electron Devices Society
Starting Page	446
Ending Page	448
Page Count	3
File Size	109378
File Format	PDF
ISSN	07413106
Volume Number	28
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-05-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	SONOS devices EPROM Implants Charge carrier processes Electrons Semiconductor device doping Semiconductor memory Nonvolatile memory Flash memory Silicon on insulator technology 2-bit operation Bit coupling compensation implant flash halo implant localized charge storage non volatile semiconductor memory (NVSM) program speed read disturb SONOS
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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Dual-Bit/Cell SONOS Flash EEPROMs: Impact of Channel Engineering on Programming Speed and Bit Coupling Effect