NDLI: Placement Algorithm in Analog-Layout Designs

Content Provider	IEEE Xplore Digital Library
Author	Lihong Zhang Raut, R. Yingtao Jiang Kleine, U.
Copyright Year	1982
Abstract	Analog macrocell placement is an NP-hard problem. This paper presents an attempt to solve this problem by using the optimization flow of a genetic algorithm (GA) enhanced by simulated annealing (SA). The bit-matrix representation is employed to improve the search efficiency. In particular, to reduce the solution space without degrading search opportunities, the technique of cell slide is deployed to transform an absolute placement to a relative placement. Following this cell-slide process, it is proved that, for an initial placement, there always exists a solution that can guarantee no occurrence of overlaps among cells and meet any applicable symmetry constraints pertaining to analog layouts. For the optimization of the algorithm parameters, the fractional factorial experiment using an orthogonal array has been conducted, and the exact parameter values are determined using a meta-GA approach. The experimental results show that, compared with the SA approach, the proposed algorithm consumes less computation time while generating higher quality layouts, comparable to expert manual placements
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	1889
Ending Page	1903
Page Count	15
File Size	1012461
File Format	PDF
ISSN	02780070
Volume Number	25
Issue Number	10
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-10-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Macrocell networks Genetic algorithms Simulated annealing Analog circuits Integrated circuit layout Integrated circuit synthesis Design automation NP-hard problem Degradation simulated annealing (SA) Analog integrated circuits (ICs) genetic algorithm (GA) layout of integrated circuits
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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