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Content Provider | IEEE Xplore Digital Library |
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Author | Zhai, C.J. Sidharth Blish II, R.C. Master, R.N. |
Copyright Year | 2001 |
Abstract | A generalized plane strain condition is assumed for an edge interfacial crack between die passivation and underfill on an organic substrate flip chip package. C4 solder bumps are explicitly modeled. Temperature excursions are treated as loading conditions. The design factors studied include underfill elastic modulus, underfill coefficient of thermal expansion (CTE), fillet height, and die overhang. Varying underfill modulus and CTE produces a different stress field at underfill/die passivation interface, different stress intensity factor (SIF), and phase angle (/spl psi/) even under the same loading condition. The baseline case uses underfill with elastic modulus of 6 GPa, CTE of 36 ppm//spl deg/C and fillet height equal to half die thickness. Four more cases involving underfill material properties are investigated by varying elastic modulus between 3 and 9 GPa, and by varying CTE between 26 and 46 ppm//spl deg/C. The effect of fillet height is also studied by assuming no fillet and full fillet, i.e., fillet height equal to die thickness. Finally, two cases concerning the influence of die overhang, defined as the nominal distance between outermost solder joint and die edge, are investigated. Fracture parameters, including energy release rate (G) and phase angle (/spl psi/), are evaluated as a function of dimensions. Underfill material properties (elastic modulus and CTE), fillet configuration, and die overhang can be optimized to reduce the risk of underfill delamination in flip chip or direct chip attach (DCA) applications. |
Sponsorship | IEEE Electron Devices Society IEEE Reliability Society |
Starting Page | 86 |
Ending Page | 91 |
Page Count | 6 |
File Size | 346450 |
File Format | |
ISSN | 15304388 |
Volume Number | 4 |
Issue Number | 1 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2004-03-01 |
Publisher Place | U.S.A. |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Delamination Flip chip Packaging Passivation Thermal stresses Material properties Capacitive sensors Temperature Thermal expansion Thermal factors |
Content Type | Text |
Resource Type | Article |
Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering Safety, Risk, Reliability and Quality |
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