NDLI: Jitter transfer analysis of tracked oversampling techniques for multigigabit clock and data recovery

Content Provider	IEEE Xplore Digital Library
Author	Youngdon Choi Deog-Kyoon Jeong Kim, W.
Copyright Year	1992
Abstract	Bang-bang controlled clock-recovery is widely used in serial link applications as it offers ideal matching between the timing and data samplers and is amenable to fast digital implementation. However, the bang-bang phase detection discards the magnitude information of the timing error and results in inconsistent loop dynamics that vary with the input-noise characteristics. This paper analyzes the jitter-dependent behavior of the tracked oversampling clock-recovery loop, by introducing the concept of effective phase detector gain. Three methods to stabilize the loop bandwidth against jitter variation are described and compared: adapting the loop gain, increasing the oversampling ratio, and adjusting the sampling points. The analyses are then verified with the jitter transfer characteristics obtained from time-step behavioral simulation.
Sponsorship	IEEE Circuits and Systems Society
Starting Page	775
Ending Page	783
Page Count	9
File Size	550599
File Format	PDF
ISSN	10577130
Volume Number	50
Issue Number	11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-11-01
Publisher Place	U.S.A.
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Jitter Clocks Timing Phase detection Bandwidth Detectors Error correction Sampling methods Robustness Feedback loop
Content Type	Text
Resource Type	Article
Subject	Signal Processing Electrical and Electronic Engineering

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