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Content Provider | ACM Digital Library |
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Author | Wu, Meng Wang, Chao Guo, Shengjian |
Abstract | Programmable logic controllers (PLCs) are specialized computers for automating a wide range of cyber-physical systems. Since these systems are often safety-critical, software running on PLCs need to be free of programming errors. However, automated tools for testing PLC software are lacking despite the pervasive use of PLCs in industry. We propose a symbolic execution based method, named SymPLC, for automatically testing PLC software written in programming languages specified in the IEC 61131-3 standard. SymPLC takes the PLC source code as input and translates it into C before applying symbolic execution, to systematically generate test inputs that cover both paths in each periodic task and interleavings of these tasks. Toward this end, we propose a number of PLC-specific reduction techniques for identifying and eliminating redundant interleavings. We have evaluated SymPLC on a large set of benchmark programs with both single and multiple tasks. Our experiments show that SymPLC can handle these programs efficiently, and for multi-task PLC programs, our new reduction techniques outperform the state-of-the-art partial order reduction technique by more than two orders of magnitude. . |
Starting Page | 326 |
Ending Page | 336 |
Page Count | 11 |
File Format | |
ISBN | 9781450351058 |
DOI | 10.1145/3106237.3106245 |
Language | English |
Publisher | Association for Computing Machinery (ACM) |
Publisher Date | 2017-08-21 |
Publisher Place | New York |
Access Restriction | Subscribed |
Subject Keyword | Plc Programmable logic controller Symbolic execution Scada Partial order reduction Test generation |
Content Type | Text |
Resource Type | Article |
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