NDLI: Research and realization of TURBO Codec in the space laser communication

Content Provider	IEEE Xplore Digital Library
Author	Chang Limin Song Lu Zhang Qingguo
Copyright Year	2009
Description	Author affiliation: Department of Electronic Engineering, Changchun University of Science &Technolog, Jilin, China, 130022 (Chang Limin; Song Lu) \|\| Department of Control Engineering, Air Force Aviation University, Changchun, Jilin, China, 130022 (Zhang Qingguo)
Abstract	Adopting Forward Error Correction (FEC), technologies for the laser communication system such as encode, interleaving, decode have been discussed in detail in the system. TURBO code is applied in this system which can reduce the system BER effectively. We make a detailed analysis of principle and performance of encoder, interleaver and decoder. Meanwhile, we compare their performance and computational complexity in three algorithms: MAP, Log-MAP and Max-log-MAP. Besides, principle and process of Max- log-MAP decoding algorithm are emphatically discussed. On this basis, a TURBO codec with fixed frame length was designed based on Max-log-MAP decoding algorithm and FPGA technique. MATLAB simulation shows BER of codec at different bit rates and with different length of frame can reach to the order of $10^{−5}∼10^{−6}.$
Starting Page	471
Ending Page	475
File Size	4019886
Page Count	5
File Format	PDF
ISBN	9781424426928
DOI	10.1109/ICMA.2009.5246566
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-08-09
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Turbo codes Decoding Space technology Forward error correction Bit error rate Interleaved codes Performance analysis Computational complexity Algorithm design and analysis Field programmable gate arrays FPGA TURBO Code FEC
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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