NDLI: A 1.0 V 230 MHz column-access embedded DRAM macro for portable MPEG applications

Content Provider	IEEE Xplore Digital Library
Author	Tomishima, S. Tsuji, T. Kawasaki, T. Ishikawa, M. Inokuchi, T. Kato, H. Tanizaki, H. Abe, W. Shibayama, A. Fukushima, Y. Niiro, M. Maruta, M. Uchikoba, T. Senoh, M. Sakamoto, S. Ooishi, T. Kikukawa, H. Hidaka, H. Takahashi, K.
Copyright Year	2001
Description	Author affiliation: Mitsubishi Electr. Corp., Hyogo, Japan (Tomishima, S.)
Abstract	Previous embedded DRAMs (eDRAMs) have the dual ports on the sense amplifier and wide I/O buses on memory arrays for high data rate in graphic controller chips. This causes decreased cell efficiency and increased power consumption in burst operation compared to commodity DRAM. This eDRAM macro provides the low power consumption and small die needed in portable multi media equipment with MPEG logic, such as video phone, video camera, and personal digital assistant (PDA). To incorporate 0.13 μm logic technology for low power, the power supply is reduced to 1.0 V for logic and 2.5 V for other circuitry. This paper describes realizing fast memory access even at such low voltage.
Sponsorship	IEEE Solid-State Circuits Soc.
Starting Page	384
Ending Page	385
File Size	301835
Page Count	2
File Format	PDF
ISBN	0780366085
ISSN	01936530
DOI	10.1109/ISSCC.2001.912684
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-02-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Power supplies Pulse amplifiers MOSFETs Logic circuits Voltage Delay Energy consumption Personal digital assistants Power amplifiers
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Electronic, Optical and Magnetic Materials

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