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2012 IEEE International High Level Design Validation and Test Workshop (HLDVT)

Chairs welcome message

Organizing committee

Table of contents

Sequential equivalence checking of hard instances with targeted inductive invariants and efficient filtering strategies

Behavior Driven Development for circuit design and verification

Using decision diagrams to compactly represent the state space for explicit model checking

Automatic generation of deadlock detection algorithms for a family of microarchitecture description languages of communication fabrics

Automatic generation of Verilog bus transactors from natural language protocol specifications

Single-source hardware modeling of different abstraction levels with State Charts

Using haloes in mixed-signal assertion based verification

A formal method to improve SystemVerilog functional coverage

A functional test generation technique for RTL datapaths

Constrained signal selection for post-silicon validation

The strange pair: IP-XACT and univerCM to integrate heterogeneous embedded systems

Monitoring distributed reactive systems

Embedded system verification through constraint-based scheduling

Accurate profiling of oracles for self-checking time-constrained embedded software

Post-silicon verification and debugging with control flow traces and patchable hardware

On-chip stimuli generation for post-silicon validation

Emulation in post-silicon validation: It's not just for functionality anymore

Eliminating race conditions in system-level models by using parallel simulation infrastructure

Cause and effect of nondeterministic behavior in sequential and parallel SystemC simulators

Accelerating SystemC simulations using GPUs

A flexible modeling environment for a NoC-based multicore architecture

ToucHMore toolchain and system software for energy and variability customisation

Energy aware TLM platform simulation via RTL abstraction

Generating formal system models from natural language descriptions

2011 IEEE International High Level Design Validation and Test Workshop

2010 IEEE International High Level Design Validation and Test Workshop (HLDVT)

2009 IEEE International High Level Design Validation and Test Workshop

2008 IEEE International High Level Design Validation and Test Workshop

2007 IEEE International High Level Design Validation and Test Workshop

2006 IEEE International High Level Design Validation and Test Workshop

Tenth IEEE International High-Level Design Validation and Test Workshop, 2005.

Proceedings. Ninth IEEE International High-Level Design Validation and Test Workshop (IEEE Cat. No.04EX940)

Eighth IEEE International High-Level Design Validation and Test Workshop

Seventh IEEE International High-Level Design Validation and Test Workshop, 2002.

Sixth IEEE International High-Level Design Validation and Test Workshop

Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786)

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Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in