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2015 International Conference on Field Programmable Technology (FPT)

2013 International Conference on Field-Programmable Technology (FPT)

2012 International Conference on Field-Programmable Technology

2011 International Conference on Field-Programmable Technology

2010 International Conference on Field-Programmable Technology

2009 International Conference on Field-Programmable Technology

2008 International Conference on Field-Programmable Technology

2007 International Conference on Field-Programmable Technology

2006 IEEE International Conference on Field Programmable Technology

Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005.

Proceedings 2005 IEEE International Conference on Field Programmable Technology

Table of contents

Message from the General Chair

Message From the Technical Program Chair

Technical Program Committee

Additional reviewers

Platform-based synthesis for field-programmable SOCs

Low power and high speed issues in FPGA chips

System architectures and design patterns for reconfigurable computing

Reconfigurable hardware operating systems

A custom instruction approach for hardware and software implementations of finite field arithmetic over F/sub 2163/ using Gaussian normal bases

High-radix systolic modular multiplication on reconfigurable hardware

Pipelining saturated accumulation

A parameterized floating-point exponential function for FPGAs

The Erlangen slot machine: increasing flexibility in FPGA-based reconfigurable platforms

Task placement for heterogeneous reconfigurable architectures

A framework for dynamic resource assignment and scheduling on reconfigurable mixed-mode on-chip multiprocessors

High quality uniform random number generation through LUT optimised linear recurrences

Solving the minimum dominating set problem with instance-specific hardware on FPGAs

Custom hardware architectures for posture analysis

Correlation-based fingerprint matching using FPGAs

A single-chip FPGA implementation of real-time adaptive background model

FPGA-based hardware for physical modelling sound synthesis by finite difference schemes

Have GPUs made FPGAs redundant in the field of video processing?

S5: the architecture and development flow of a software configurable processor

RoMultiC: fast and simple configuration data multicasting scheme for coarse grain reconfigurable devices

Pipeline scheduling for array based reconfigurable architectures considering interconnect delays

High-speed hardware architectures of the Whirlpool hash function

Secure partial reconfiguration of FPGAs

An adaptive cryptographic accelerator for IPsec on dynamically reconfigurable processor

Dynamic voltage scaling for commercial FPGAs

FPGA architecture for standby power management

FPGA defect tolerance: impact of granularity

A dynamically reconfigured UMTS multi-channel complex code matched filter

Prototyping automatic cloud cover assessment (ACCA) algorithm for remote sensing on-board processing on a reconfigurable computer

Reconfigurable acceleration for Monte Carlo based financial simulation

Accelerating FPGA routing using architecture-adaptive A* techniques

Compiler-directed design space exploration for caching and prefetching data in high-level synthesis

Post-silicon debug using programmable logic cores

FPGA organization for the fast path-based neural branch predictor

FPGA implementation of an excitatory and inhibitory connectionist model for motion perception

Spatiotemporal simulation of a single living cell

Dynamic loading of peripherals on reconfigurable system-on-chip

An FPGA model for developing dynamic circuit computing

ADH: an aspect described hardware programming language

From TLM to FPGA: rapid prototyping with SystemC and transaction level modeling

Rapid reconfiguration of an optically differential reconfigurable gate array with pulse lasers

Hardware-accelerated SSH on self-reconfigurable systems

A fast and efficient FPGA-based implementation for solving a system of linear interval equations

Heuristics for context-caches in 2-level reconfigurable architectures

Performance of sorting algorithms on the SRC 6 reconfigurable computer

A zero-overhead dynamic optically reconfigurable gate array

The Transmogrifier-4: an FPGA-based hardware development system with multi-gigabyte memory capacity and high host and memory bandwidth

High performance channel model hardware emulator for 802.11n

HW/SW interface synthesis based on Avalon bus specification for Nios-oriented SoC design

A reconfigurable architecture for implementing multiple cipher algorithms

Low latency elliptic curve cryptography accelerators for NIST curves over binary fields

A system-level design methodology for reconfigurable computing applications

Optimal FFT architecture selection for OFDM receivers on FPGA

An FPGA-based infant monitoring system

FPGA-based conformance testing and system prototyping of an MPEG-4 SA-DCT hardware accelerator

FPGA core network implementation and optimization: a case study

A state-serial Viterbi decoder architecture for digital radio on FPGA

A design methodology to generate dynamically self-reconfigurable SoCs for Virtex-II Pro FPGAs

Implementation of Gabor-type filters on field programmable gate arrays

A scaleable FFT/IFFT kernel for communication systems using codesign approach

FPGA based router for cognitive packet networks

An overview of high-level synthesis of multiprocessors for logic programming

Implementation of EAX mode of operation for FPGA bitstream encryption and authentication

Net power directed clustering algorithm for low net-power implementation of FPGAs

The design of scalable stochastic biochemical simulator on FPGA

Designing an FPGA SoC using a standardized IP block interface

Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)

Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798)

2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.

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Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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