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Content Provider | IEEE Xplore Digital Library |
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Author | Stoica, A. Zebulum, R.S. Ferguson, M.I. Keymeulen, D. Vu Dong |
Copyright Year | 2002 |
Description | Author affiliation: Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA (Stoica, A.; Zebulum, R.S.; Ferguson, M.I.; Keymeulen, D.; Vu Dong) |
Abstract | The purpose of this paper is twofold: first, to illustrate a stand-alone board-level evolvable system (SABLES) and its performance, and second to illustrate some problems that occur during evolution with real hardware in the loop, or when the intention of the user is not completely reflected in the fitness function. SABLES is part of an effort to achieve integrated evolvable systems. SABLES provides autonomous, fast (tens to hundreds of seconds), on-chip evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution. It also illustrates how specifications not completely reflected in the fitness function, such as the time scales of response for logical circuits, may lead to overall unsatisfactory solutions. Both such situations can be handled with appropriate modification of fitness function and additional testing. |
Sponsorship | NASA Defense Adv. Res. Projects Agency (DARPA) |
Starting Page | 67 |
Ending Page | 74 |
File Size | 601197 |
Page Count | 8 |
File Format | |
ISBN | 0769517188 |
DOI | 10.1109/EH.2002.1029868 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2002-07-15 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Hardware Field programmable analog arrays Digital signal processing chips Field programmable gate arrays Circuit testing Evolutionary computation Circuit stability Time factors Supercomputers Application specific integrated circuits |
Content Type | Text |
Resource Type | Article |
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