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Content Provider | IEEE Xplore Digital Library |
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Author | Xi Liu Qiao Chen Dixit, P. Chatterjee, R. Tummala, R.R. Sitaraman, S.K. |
Copyright Year | 2009 |
Description | Author affiliation: Microsystems Packaging Research Center, Georgia Institute of Technology, Atlanta, 30332-0405, uSA (Xi Liu; Qiao Chen; Dixit, P.; Chatterjee, R.; Tummala, R.R.; Sitaraman, S.K.) |
Abstract | Through-Silicon Vias (TSVs) have garnered a lot of interest in recent years because TSV is a key enabling technology for three dimensional (3D) Integrated Circuit (IC) stacking, silicon interposer technology, and advanced wafer level packaging (WLP). There has been significant effort in TSV fabrication and electrical design. However, considerably less work has been done on thermo-mechanical analysis and mechanical design of these structures. Due to the high coefficient of thermal expansion (CTE) mismatch between Si and the conducting material in the vias, thermo-mechanical reliability is a major concern. This paper uses Finite-Element (FE) models and X-ray diffraction (XRD) experiments for the thermo-mechanical analysis of TSVs. Two-dimensional thermo-mechanical Finite-element models have been built to analyze the stress/strain distribution in the TSV structures, and the models show that large stress gradients and plastic deformation exist near the corner of electroplated Cu pads. The stress results from the finite-element models have been compared against XRD experimental data. A fracture mechanics analysis has also been performed, and the fracture analysis shows that Cu/SiO2 interfacial cracks and SiO2 cohesive cracks are more likely to initiate and propagate at those corner locations. |
Starting Page | 624 |
Ending Page | 629 |
File Size | 715512 |
Page Count | 6 |
File Format | |
ISBN | 9781424444755 |
ISSN | 05695503 |
DOI | 10.1109/ECTC.2009.5074078 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2009-05-26 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Through-silicon vias Failure analysis Copper Thermomechanical processes Finite element methods Thermal stresses Integrated circuit technology X-ray scattering Deformable models Performance analysis XRD measurements Through Silicon Via Finite-Element Modeling Thermo-mechanical Reliability |
Content Type | Text |
Resource Type | Article |
Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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