NDLI: A circuit-level implementation of fast, energy-efficient CMOS comparators for high-performance microprocessors

Content Provider	IEEE Xplore Digital Library
Author	Ergin, O. Ghose, K. Kucuk, G. Ponomarev, D.
Copyright Year	2002
Description	Author affiliation: Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA (Ergin, O.; Ghose, K.; Kucuk, G.; Ponomarev, D.)
Abstract	Datapath components in modem high performance superscalar processors employ a significant amount of associative addressing logic based on the use of comparators that dissipate energy on a mismatch. These comparators are used to detect a full match, but as mismatches are much more common than full matches in some components of the CPU, considerable energy-inefficiencies occur within the associative logic. We propose the design of two new comparator circuits that predominantly dissipate energy on a match, thus resulting in very significant savings in comparator power dissipation. The proposed designs are evaluated using SPICE simulations of actual VLSI layouts of the comparators in 0.18 micron 6-metal layer process and micro-architectural level statistics.
Sponsorship	IEEE Comput. Soc. Tech. Committee on Design Autom. IEEE Circuits & Syst. Soc
Starting Page	118
Ending Page	121
File Size	296422
Page Count	4
File Format	PDF
ISBN	0769517005
ISSN	10636404
DOI	10.1109/ICCD.2002.1106757
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-09-18
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy efficiency Microprocessors Modems CMOS logic circuits Central Processing Unit Power dissipation SPICE Circuit simulation Very large scale integration Statistics
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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