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2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)

2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)

2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)

2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)

2010 53rd IEEE International Midwest Symposium on Circuits and Systems

2009 52nd IEEE International Midwest Symposium on Circuits and Systems

2008 51st Midwest Symposium on Circuits and Systems

2007 50th Midwest Symposium on Circuits and Systems

2006 49th IEEE International Midwest Symposium on Circuits and Systems

Volume 2 - 2006

Volume 1 - 2006

Proceedings of the 2006 49th Midwest Symposium on Circuits and Systems

Welcome to the 49th IEEE International Midwest Symposium on Circuits and Systems

Symposium Support

MWSCAS 2006 Advisory Committee

Technical Tracks

MWSCAS 2006 Reviewers

General Information

Student Paper Contest

Myril B. Reed Best Paper Award

Analog in a Digital World

Multicell Delta-Sigma Data Converters

Circuit Techniques for Operational Amplifier Speed and Accuracy Improvement: Analog Circuit Design with Structural Methodology

RF Wireless Integrated Architectures for 4G Communication Systems

Substrate Noise suppression Techniques for Systems on Chip

Advanced Multi-Antenna Techniques

Design-for-Test of Mixed-Signal Integrated Circuits

Sensor Data Fusion and Integration with Applications to Target Tracking and Robotics

Session Program and Abstracts

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An Optimized Pipelined-Subranging ADC Architecture

An Ultra-Low-Power Successive-Approximation-Based ADC for Implantable Sensing Devices

A Multi-bit Switched Capacitor DAC with Robust Analog Background Calibration

A Low Power, Low Distortion Single-bit Sigma-Delta Audio DAC with Distributed Feedback from Analog Output

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Design and Synthesis of Flagged Binary Adders with Constant Addition

Optimization of Speed and Power in a 16-Bit Carry Skip Adder in 70nm Technology

An Ultra-Low Voltage 200 MHz 0.6 pJ Add-Compare-Select Unit in 180 nm CMOS

Effects of Process and Environmental Variations on Adder Architectures

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Novel Sapphire Directional Filters for Ultra Low Phase Noise Applications

An Ultra Low Power ESD Protected Mixer in 90nm RF CMOS

Close-in Phase Noise of a Digitally Tuned VCO

Synchronization of Van der Pol Oscillator By External Voltage of Double Frequency

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Low-Power High-Voltage Non-overlapping Clock Generators for Switched-Capacitor step-up DC-DC Converters

Electrostatic Energy Harvester and Li-Ion Charger Circuit for Micro-Scale Applications

CMOS Energy Harvester Based on a Low-Cost Piezoelectric Acoustic Transducer

A Multi-Phase DPWM Based on Fully Table Look-up for High-frequency Power Converters

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Programmable Connections in Neuromorphic Grids

Via-Programmable Structured ASIC Fabric Based on MCML Cells: Design Flow and Implementation

A Power-Gating Technique for Adiabatic Circuits Using Bootstrapped NMOS Switches

A GALS Solution Based on Highly Scalable, Low Latency, Crossbar Using Token Ring Arbitration

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MEMS-Based Scanner Dedicated for Ultrasound Medical Imaging

Novel Control of Quantum Harmonic Oscillator System

Force Measurement of Embryonic System Using In Situ PVDF Piezoelectric Sensor

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Pipelined Delta Sigma Modulator Analog to Digital Converter

A Novel Biquad Filter Circuit for Continuous-Time Sigma-Delta Modulators

Influences of oversampling and analog imperfections on Hybrid Filter Bank A/D converters

Sub-1V Supply CMOS Voltage References Based on Asymmetric Differential Stage

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Adaptive Notch Filters Using A Complex Heterodyne Approach

Suboptimal frequencial equalisation of a mono or multicarrier system

Digital Channelized Wide Band Receiver Implemented with a Systolic Array of Multi-Rate FIR Filters

An Optimum Block Adaptive ICA Algorithm with Individual Adaptation for Wireless QAM Receivers in Dynamic Environments

Low Delay Perfect Reconstruction Transmultiplexer with Coefficients in Low Dynamical Range

Multiplier-Free Wide-Band FIR Filter Design Using Modified Frequency Masking Technique

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A Triple Mode LNA Enhanced by Dual Feedback Loops for Multi Standard Receivers

An Improved Bang-bang PLL Employing a Quaternary Phase Detector

An Overview of SDMA in Communications Systems

A Low Power 90 nm LNA with an Optimized Spiral Inductor Model for WiMax Front End

Embedding IEEE 1451.4 smart sensing nodes in a Wireless Air Quality Monitoring Network

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A Fast Full Search Scheme for Rate-Distortion Optimization of Variable Block Size and Multi-frame Motion Estimation

A New Fuzzy Entropy Clustering Method with Controllable Membership Characteristics

A Periodically Kicked Chaos Circuit For Rank-One Attractor Generation

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A Reduced Clock Delay Approach for High Performance Mesochronous Pipeline

An Energy-Efficient Differential Flip-Flop for Deeply Pipelined Systems

Wave-Pipelining the Global Interconnect to Reduce the Associated Delays

Clock Skew Reduction by Link-region Technique

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Compact Novel Floating Gate Offset Compensation Scheme with Low Sensitivity to Charge Injection, Clock Feedthrough and Leakage

Noise Suppression in a Class-D Amplifier Using a Three-Level Converter

Analytical Optimization of a Multistage Amplifiers

A New CMOS Current Integrating Receiver For GByte/s Parallel Links

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Dynamic PECT Effect for Nanotransducers and Hybrid Devices

Frame-Based SEMG-to-Speech Conversion

A Biologically Plausible System Approach for Noise Robust Vowel Recognition

Reducing Collision Noise In Asynchronous Vision Chips

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A SPICE-Oriented Method for Finding DC Operating Points of Nonlinear Circuits Containing One-Port Macromodels

Timing-Driven Physical Design for VLSI Circuits Using Resonant Rotary Clocking

Accuracy and Efficiency Enhancement in Model Order Reduction of Large Circuits

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Efficient Codesign For Geology Image Processing

System Level Design Exploration of JPEG 2000 with SoftSONIC Virtual Hardware Platform

High Throughput FPGA Based Architecture for H. 264/AVC Inverse Transforms and Quantization

Design of a Digital Architecture for Real-Time Video, Enhancement Based on Illuminance-Reflectance Model

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A Low Computation Adaptive Blind Mismatch Correction for Time-Interleaved ADCs

A Study on Noise Reduction Method Based on Noise Reconstruction System with Step Size Control

A Fuzzy Logic Framework to Estimate the Angular Turn Rate for High-Performance Target Tracking

Adaptive Digital Non-Blind Beamformer for Small Number of Snapshots

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Analysis and Simulation of Phase Noise in Distributed Oscillators

Impact of Amplitude Phase Correlation on Oscillator Phase Noise Model

Truly Random Number Generators Based On a Double-Scroll Attractor

Logmap Based Analog Random Number Generator

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High Performance Memory Read Using Cross-Coupled Pull-up Circuitry

A Study of Finite State Machine Coding Styles for Implementation in FPGAs

Reversible Logic to Cryptographic Hardware: A New Paradigm

A High Speed Flexible Encoder for Low-Density Parity-Check Codes

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A Low Power CMOS Low Noise Amplifier for 3-10G-Hz Ultra-wideband Wireless Receivers

An Inductive-bounce Enhanced Output-pad for CMOS UltraWideBand RF Applications

An Optimized CMOS Gilbert Mixer Using Inter-Stage Inductance for Ultra Wideband Receivers

Analysis Of The Effects Of The Load On The Gain, Linearity And Noise Figure Of A Gilbert Cell Double Balanced Mixer

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TRTRL: A Localized Resource-Efficient Learning Algorithm for Recurrent Neural Netowrks

The Least-Squares Mixed-Norm Support Vector Classifier

Pattern Recognition and Text-Dependent Recognition for a Mobile Robot

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Hardware/Software Exploration for an Anti-collision Radar System

Encoding to Reduce Crosstalk Noise and Power Dissipation: A New Closed Formula

Vowel Classification and Identification Using the QOBE Algorithm

The Morphable Nanoprocessor Architecture: Reconfiguration at Runtime

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Electrostatic and Piezoelectric Testing Methods for RF MEMS Resonators

Universal Tone Detection Based on the Goertzel Algorithm

Time domain phase noise synthesis for system simulation

High Spectral Efficiency Modulation Technique for Wireless Multipath Fading Channel

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Systolic Computational-Memory Architecture for an FPGA-based Flow Solver

Two Binary Algorithms for Calculating the Jacobi Symbol and a Fast Systolic Implementation in Hardware

Hardware Implementation of Image Space Reconstruction Algorithm using FPGAs

Efficient Building Blocks for Reversible Sequential Circuit Design

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Delta-IDDQ Testing of a CMOS 12-Bit Charge Scaling DigitaltoAnalog Converter

Topology Transformations for Symbolic Analysis

Low Power and High Speed Sample-and-Hold Circuit

Integrator Bound-Based Nonlinear Decoder for Delta-Sigma Modulator

A Rail-to-Rail Delay Line for Time Analog-to-Digital Converters

High Accuracy Self-Biasing Cascode Current Mirror

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Automated Design Flow for Multi-Context FPGAs

Reconfigurable Implementation of Wavelet based Image Denoising

DC Correct Operation in MOBILE Inverters

A Comparison Between Noise-Immunity Design Techniques for Dynamic Logic Gates

Conditioned HDL Slicing A way to Speed-up Formal Verification

Impact of Buffering Mechanism on Sofpga IP Router Cost

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Hybrid Speed Control with Sliding-Mode plus Self-Tuning PI for Induction Motor Drive

A Symmetric Multiprocessor Architecture for Multi-Agent Temporal Difference Learning

Autonomous Air Duct Cleaning Robot System

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Analysis of Soft Error Mitigation Techniques for Register Files in IBM Cu-08 90nm Technology

Hardware Coprocessor Design for Fingerprint Image Enhancement

A Multiplier-less Algorithm for Evaluating Intrinsic and Nonlinear Functions

Combination Selection Counter for Gaussian Distribution Applications

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Aggressive Area Scaling in Passive Transresistance Networks

A Delay Characterization Method for Integrated Devices

Abrupt Power-Off Detector for Mobile TFT-LCD Driver IC

Synchronization of Multiple DCO's (Clocks) for AFM Probe-Arrays

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Reconfigurable Digital/Analog Processor Array for the Simulation of Gene Regulatory Networks

A Novel Current-feedback Nano-Siemen Transconductance Circuit Suitable for Large Time-constant Applications

Introducing the Differentiated All-Pole and One-Zero Gammatone Filter Responses and their Analog VLSI Log-domain Implementation

A High-Voltage Output Driver for Implantable Biomedical Stimulators and I/O Applications

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A Self-Adaptive Evolutionary Programming Approach for Power System State Estimation

Differential Evolution-Based Weighted Least Squares State Estimation with Phasor Measurement Units

Effect of Size on Analog Circuit Based Emulation of Steady-State Power System Behavior

A Strategy for Med-Long Term Load Forecast Based on the Fuzzy Complementary AHP

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Wavelet-Based Video Denoising Using Gauss-Hermite Density Function

Recognition of Noisy Facial Images Employing Transform - Domain Two-Dimensional Principal Component Analysis

Implementation of NEDA-based DCT architecture using even-odd decomposition of the 8 × 8 DCT matrix

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Continuous Adaptive Feedback Canceller Dynamics

29% Power Saving through Semi-Custom Standard Cell Re-Design in a Front-End for Hearing Aids

Development of a Low Cost Eye Diagram Analyzer for Optical Network Performance Monitoring Based on Q-Factor BER Estimation

Design of High-Precision Low-Power Interpolation Modules with Modified SINC Filters

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Investigation of Internal Fault Modeling of Powerformer Part I: The Machine Model

OLTC Measurements in Electrical Power Grids

Static output characteristic of a peak current controlled arc welding machine

Recursive Identification of Electric Drives using Gray-Box Models

Investigation of Internal Fault Modeling of Powerformer Part II: Model Performance

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A New Linearity Enhancing Technique for 802.11 b/g Low Noise Amplifiers

More Practical Intermodulation Distortion in Envelope Elimination and Restoration RF Power Amplifiers

A comparison of Sigma-Delta Modulator techniques for fractional-N frequency synthesis

A Novel Stacked Design of a LC VCO-Prescaler Combination in Sub-Micron PDSOI CMOS

An Ultra-Low Power Pulse-Based UWB Transceiver SoC with on-Chip ADC

Fast-locking Integer/Fractional-N Hybrid PLL Frequency Synthesizer

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A 16-bit CMOS Digitally Controlled Oscillator Using a Novel Control Scheme

Design of a High-performance Envelope Detector

Clock and Data Recovery Circuit Using Digital Phase Aligner and Phase Interpolator

CMOS Digital Pixel Sensor with Multiple Reference, Multiple Sampling Dynamic Range Enhancement

A 14-bit cascaded 3-2 Sigma-Delta Modulator for VDSL

New Analysis and Design Technique for Analog Circuits

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Low Power Arithmetic Circuits in Feedthrough Dynamic CMOS Logic

Adiabatic CPL Circuits for Sequential Logic Systems

Energy-Aware Differential Current Sensing for Global On-Chip Interconnects

A New Low Power High Performance Flip-Flop

Improved Design of Low-Power Register File Using P-type Adiabatic Line Drivers

A Compact Correlation Filter For On-Chip Learning in a Spiking Neural Network

48th Midwest Symposium on Circuits and Systems, 2005.

The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.

2003 46th Midwest Symposium on Circuits and Systems

The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002.

Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)

Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)

42nd Midwest Symposium on Circuits and Systems (Cat. No.99CH36356)

1998 Midwest Symposium on Circuits and Systems (Cat. No. 98CB36268)

Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg

Proceedings of the 39th Midwest Symposium on Circuits and Systems

38th Midwest Symposium on Circuits and Systems. Proceedings

Proceedings of 1994 37th Midwest Symposium on Circuits and Systems

Proceedings of 36th Midwest Symposium on Circuits and Systems

[1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems

[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems

Proceedings of the 33rd Midwest Symposium on Circuits and Systems

Proceedings of the 32nd Midwest Symposium on Circuits and Systems,

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